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Czochralski vs. VGF: Why Compound Semiconductors Favor Gradient Freeze Crystal Growth
In compound semiconductor crystal preparation, Czochralski (CZ) pulling and vertical gradient freeze (VGF) are the two mainstream crystal growth routes. As demand for materials such as indium phosphide and gallium…
Metrology Becomes the Key to Yield: The Industry’s ‘Eyes’ Support Advanced-Process Ramp
On advanced-process and highly complex packaging lines, metrology and inspection equipment are known as the “eyes” of semiconductor manufacturing. As fabs enter the critical yield-ramp phase, the precision and coverage…
Advanced Processes Drive Cleanroom Upgrades as Class 10/100 Cleanrooms Become Fab Standard
The cleanroom is the foundation of wafer fabrication. As line widths shrink and advanced packaging spreads, control of airborne particles becomes ever stricter, and Class 10 and Class 100 cleanrooms…
VGF Crystal Growth Furnaces Become Mainstream as InP and GaAs Production Localizes
As demand for indium phosphide and gallium arsenide substrates continues to grow, vertical gradient freeze (VGF) crystal growth furnaces have evolved from early laboratory equipment into mainstream production tools for…
UPW and Wet Electronic Chemicals: The ‘Water Infrastructure’ Behind Wafer Cleaning
Wafer cleaning equipment may be the headline, but what truly sets the upper limit of cleaning performance is often the invisible ‘water and chemical’ system behind it. Ultra-pure water (UPW)…
Hebei Positions for Third-Generation Semiconductors as Handan Builds Materials Cluster
Hebei Province is accelerating its positioning in third-generation semiconductors. Building on its existing equipment and materials base, Handan is cultivating a cluster of electronic specialty gases and compound semiconductor materials,…
Nexchip Phase IV and Hua Hong Wuxi Phase III Kick Off One After Another as China’s 300mm Fabs Keep Expanding
Capacity expansion in China’s wafer manufacturing sector is continuing unabated. After a series of earlier 300-millimeter lines came online, Nexchip’s Phase IV project and Hua Hong’s Wuxi Phase III project…
Advanced Packaging Reshapes Wet Cleaning: New Requirements for TSV, HBM and Hybrid Bonding
As Moore’s law extends into advanced packaging, technologies such as TSV (through-silicon vias), HBM (high-bandwidth memory) and hybrid bonding are landing rapidly, and the meaning of wet cleaning is being…
Chiplet and Heterogeneous Integration Heat Up as China’s Advanced Packaging Lines Top 20 Billion RMB
With the most advanced nodes hard to push further, Chiplet and heterogeneous integration have become an important path to sustain performance gains. By packaging different small chips together, systems can…
SEMICON China 2026 Opens in Shanghai with 1,500 Exhibitors Charting a New Global Market
Asia’s leading semiconductor event, SEMICON China 2026, opened at the Shanghai New International Expo Centre, where around 1,500 exhibitors from around the world displayed the latest products across wafer fabrication,…
The Post-CMP Cleaning Battle: Nanoparticle Removal and Spin-Rinse-Dryer Drying as Yield Defenders
Chemical mechanical polishing (CMP) is the key planarization step in wafer manufacturing, but if cleaning after CMP is inadequate, nanoparticle slurry residues and metal ions become hidden killers of yield.…
Domestic 12-Inch Silicon Wafer Capacity Ramps Up to Support Chinese Fab Expansion
Domestic 12-inch semiconductor wafer capacity is ramping up steadily. Several large wafer makers report that new-line yields and shipments are improving month by month, and domestic 12-inch polished and epitaxial…
